Averaging circuit

ABSTRACT

A circuit is shown which has the unusual property of averaging the amplitude of a plurality of signals which have been received one after the other, regardless of the length of time before the signal was received, or the fact that the signal amplitude during reception increasingly changed. The number of signals so averaged may be altered at will up to a predetermined maximum. If desired, the amplitude of each of the signals being averaged can be separately indicated.

United States Patent 11 1 Freeman et al. 45 Jan. 30, 1973 541 AVERAGINGCIRCUIT 3,539,936 11 /1970 McGhee ..330/86 x Inventors: Francis R.Freeman; J p D. 3,591,785 7/l97l Miller ..328/l58 X both of Tulsa OklaPrimary Examiner-John S. Heyman [73] Assignee: Amoco Production Company,Tulsa, Attorney-Paul F. Hawley Okla.

[22] F1led: Nov. 8,1971 ABSTRACT [21] Appl 196296 A circuit is shownwhich has the unusual property of averaging the amplitude of a pluralityof signals which [52] U.S. Cl. ..328/158, 328/104, 330/86, have beenreceived one after the other, regardless of 235/154, 340/347 AD, 340/347DA the length of time before the signal was received, or [5l] Int. Cl...G06g 7/00, H03f 1/34 the fact that the signal amplitude duringreception in- [58] Field of Search ..328/127, 158, I04; 330/86;creasingly changed. The number of signals so 235/154; 340/347 AD, 347 DAaveraged may be altered at will up to a predetermined maximum. Ifdesired, the amplitude of each of the [56] References Cited signalsbeing averaged can be separately indicated.

UNITED STATES PATENTS 3 Claims, 1 Drawing Figure 3,458,82l 7/l969Clarridge ..330/86 X DATA 12 14 22 R9 H 1 REGISTERS r W I? D/A :30 RI weINPUT A/D E CONV J\/\/\, W 0- AMP OJfi UT CON 5T}: 1I 1 {-0 R2 I39 E i1111 1 1 A 1 2 it 13 5 5; R3 R11 1 E l6 F 1 1 HMA it $32 1 43 j a 5 53,13, I R4 R12 25 M 33 R44 E D/A 1 g 5 CONV. R6 5 1 JXRA 1". A 0 o 49| 40 1 1 R8 1 R16 i X 9 i 5 38 ":"9 H48 5 WA /29 g CONV AVERAGING cmcurrCROSS REFERENCE TO RELATED APPLICATION Ser. No. 162,693 Vincent andWilder, filed July l4, l97l (C.I.P. of Ser. No. 874,562, filed Nov. 6,1969, now abandoned).

BACKGROUND OF THE INVENTION This invention grew out of the developmentof a drilling cost indicator, the application for which is listed above.This drilling cost indicator has proved to be of very definite advantagein improving the drilling of a well, such as an oil or gas well. Theindicator is basically a small analog computer which produced, amongother electrical outputs which are recorded, an electrical signaldirectly proportional to the incremental cost of drilling a unit lengthof hole, such as a foot. The operator of the drill rig has independentlyat his control all of the normal variables, such as the rotational speedof the drill string, the weight on the bit, the rate of flow of drillingfluid, its composition, etc. He can change these during the drilling tosee whether he can decrease his drilling cost. The signal plotted is anelectric analog voltage which varies in relationship to the selectedvariable and the time required to drill each foot, as described morecompletely in the aboveidentified Vincent-Wilder patent application.

In using the drilling cost indicator it has been found that thisparticular indication (incremental cost per foot) is valuable, but inthe situation where it would be most useful, that is in drillingextremely tough formations, the rock properties seem to varysufficiently so that the indication for a plurality of adjacent feetchanges considerably. At times the signal may change too much to be veryuseful. By graphical means it was determined that a more usable signaloutput would be the incremental cost per foot drilled averaged over aplurality of the last feet drilled.

This presented a peculiar type of problem. The electric current beingrecorded changes in amplitude with time from an initial value of zero toa given maximum at the conclusion of drilling each foot. This variationwith time is not necessarily linear and ordinarily is not. Eachsucceeding signal appears immediately after the preceding signal hasceased. Accordingly, one must average a plurality of maximum values,which occur one after the other. Duration of any one signal may varywidely. Only in an extraordinary case will these maxima appear atregular intervals of time. Under ordinary circumstances, they occurduring completely random intervals.

DESCRIPTION OF THE PRIOR ART In reviewing various averaging circuits,none was found which permitted averaging the peak values of a pluralityof electrical signals occurring in time sequence. The type of art foundis characterized by the Schuster U.S. Pat. No. 3,404,351. In otherwords, such circuits average a plurality of simultaneously occurringsignals. In fact, as shown in Schuster, they average the simultaneousvalue of signals which vary only relatively slowly with time. In theSchuster circuit, as shown in FIG. 3, the signals are added together byconnecting the voltage sources together through essentially identicalresistors of high ohmic value and grounding the common point through aresistor of value low compared to that of any of the first resistors.Incidentally, the first resistors are called add resistors; The voltageacross the last resistor is directly proportional to the sum of thesimultaneous voltages of the sources and therefore can be considered tobe an average.

Schuster goes further in that be devised a circuit (see his FIG. 6) inwhich a comparison is made of the relative amplitude of the varioussimultaneous voltages to be averaged, and if one of the plurality (inhis case, one of the three) differs markedly from the others, a gateautomatically opens that particular circuit so that no current iscontributed to the averaging resistor through that particular addresistor. At the same time the value of the gain of the amplifier isautomatically decreased one-third so that the output appears on the samescale as when three voltages were being averaged.

Such a circuit cannot be applied to the problem of averaging the peakvalues of a plurality of electric signals of completely arbitrarytime-amplitude variation occurring one after the other. The mere factthat such signals are not occurring simultaneously indicates that acircuit of the form shown in Schuster (or as a matter of fact, any ofthe other analog addition circuits found of either series or paralleltype) cannot be used.

SUMMARY OF THE INVENTION The circuit used in this invention is acombination digital and analog circuit for averaging the value of anydesired plurality of electric signals (up to a predetermined maximum)which occur in sequence. Each varying signal in turn is fed to the inputof an analog-todigital converter which converts the amplitude to aplurality of bits. Each bit is separately placed in one of a pluralityof data registers, the number of which cor responds to the maximum bitsobtainable from the analog-to-digital converter. A separatemarker signalindicating the end of the variable input signal is generated in externalcircuitry and applied to the start terminal of the converter. The statussignal from the converter is applied in parallel to the shift commandterminals of the plurality of shift registers so that the bits stored inthe data register (representing the value of the varying input signalduring one occurrence) are shifted automatically to the next position inthe register each time a new signal is presented to the input of theconverter. One set of outputs from the shift registers is connected toone digital-to-analog converter, the next set from the shift registersto a second digital-to-analog converter, and so on. The number ofdigital-to-analog converters is equal to the maximum number of signalsto be averaged. The output terminals of a desired number of thedigital-to-analog converters are connected through summing resistors toan operational amplifier, with feedback resistors which are related invalue to the summing resistors. The summing and averaging resistor pairsare selected by relays, which are remotely preset to the desired numberof signals to be averaged. Thus the output of this amplifier is directlyproportional to the sum of the amplitudes and represents the average ofthe amplitudes of these signals. This output may be indicated or.recorded (or both) as desired. The number of signals averaged can bevery rapidly changed.

BRIEF DESCRIPTION OF THE DRAWING The drawing represents partly incircuit form and partly in block diagram form the connections of thevarious pieces of electric equipment which produce the operating circuitdescribed above.

DESCRIPTION OF THE PREFERRED EMBODIMENT Each varying electric signal ispresented in turn to the input terminals 11 of the analog-to-digitalconverter 12. The marker signal representing conclusion of one electricsignal and the start of the next is separately generated in a generator13. This generator 13 does not form a part of this invention. Forreference, the marker signal may be generated in an apparatus of thetype described in US. application Ser. No. 162,693 of Vincent and Wilderpreviously referred to, being the signal from terminals 11 in FIG. 2 ofthat application. This signal is generated each time the drill bitdrills an additional foot, or unit of depth. The input to terminals 11in this case would be those applied to the input of recorder 64 in FIG.5 of that application.

The analog-to-digital converter 12 has a plurality of output terminalsfor the various bits into which the input signal amplitude has beenconverted. (An 8-bit converter is quite satisfactory.) Each of theseterminals is connected to one input terminal of an individual dataregister. This data register is a shift register containing sufficientstorage capacity to correspond numerically to the maximum number ofsamples to be averaged. The number of data registers is equal to thenumber of bit terminals in digital-to-analog converter 12. Thus, in theFIGURE there would be eight of these data registers, but for conveniencein drawing only five have been shown, numbered 14-21.

The analog-to-digital converter 12 also has a socalled status terminalwhich is connected in parallel to the shift right terminals of all ofthe data registers. In operation, a pulse is generated by the markersignal generator 13 and applied to the converter 12. The electric signalpresent at this instant across terminals 11 of the converter is at thatinstant converted into a digital form representing this amplitude. Aftera short delay, a pulse is put out at the status terminal connected toline 52 which is connected to the shift right terminals. Accordingly, atthe occurrence of this pulse the signals on the data registers 14similarly are moved down one level in these registers.

Thus with this arrangement, the bits of digital data equivalent to thesignal on terminals 11 at the time the pulse is generated by the markergenerator 13 appear at the outputs of the converter 12. The mostsignificant bit is stored in register 14, the next most significant inregister 15, and so on until the eighth bit is stored in register 21.The data are loaded into each of the 8-bit shift registers in serialformat, and are presented at the outputs of the shift registers inparallel format. At the end of the data conversion time for each footmarker signal received, a pulse is generated at the status terminal ofconverter 12 which goes by line 52 to the appropriate terminals of allthe data registers 14 to 21 and causes these registers to shift right,placing the data corresponding to the signal just completed into thesecond register position in each of the registers 14 to 21. This leavesthe first register position in each register open to receive the newdata from the converter 12 representing the next input signal (in thiscase the cost appropriate to drilling the next foot of formation). Itcan be seen that as the sequence continues of presenting serially inturn the input cost-per-foot data, the re gisters contain the data forthe most recent eight feet of drilling. Each register is dedicated to asingle bit, thus register 14 is dedicated only to bit I for the mostrecent 8 feet of drilling, and register 21 to the eighth bit of thecorresponding eight feet of drilling.

The corresponding output terminals of all the data registers 14 to 21are connected to the appropriate bit input terminals of thedigital-to-analog converters 22 to 29. Thus the first terminal of dataregister 14 is connected to the bit-l terminal of converter 22, thecorresponding top terminal of register 15 is connected to the bit-2terminal of converter 22, and so on. There are as many digital-to-analogconverters as the maximum number of data to be averaged. Thus, if thereare eight converters, eight samples can be averaged. The secondterminals on registers 14 to 21 are separately connected to theappropriate bit terminals of converter 23, the third to the appropriatebit terminals of converter 24, and following. Many conductors have beenomitted in the FIGURE, but the above description gives the actualconnection.

The function of the single-pole, multiple-throw switch 30 will betemporarily omitted (for discussion below). The blade of this switch isconnected to one side of add resistor R The poles are connected in turnto the analog outputs of converters 22-29. The circuit contains a numberof substantially identical resistance add resistors R to R equal innumber to the number of digital-to-analog converters 22-29. The outputof converter 23 is connected to a normally open contact on a relay 31,the other contact of which is connected to one side of add resistor RSimilarly, the output terminal of the converter 24 is connected throughthe switching contacts of relay 32 to one side of add resistor R theoutput of converter 25 is connected through relay 33 to one side of addresistor R and so on. Thus the output terminal of convcrtcr 29 isconnected through the switching terminals of relay 38 to one side of addresistor R,,. The opposite terminals of all of these add resistors areconnected together by line 39. This same point is connected to one sideof an adjustable gain operational amplifier input terminal, of which theother input terminal is connected through a resistor to a groundterminal.

Preferably amplifier 40 is of the negative feedback type with sufficientnegative feedback so that the gain of the amplifier is determinedessentially only by the size of the feedback resistor and summingresistor. Feedback resistor R is permanently connected to providenegative feedback to the input of amplifier 40. The input resistance ofamplifier 40 is made small compared to the resistance of any of theseries add resistors R to R Preferably it will be of the order of atmost a very few percent of the ohmic value of any of these resistors.Thus the output of the converters 22-29 can be considered to be voltagesources connected through one or more add resistors to the input of anamplifier (40) of low input resistance, so that the voltage appearingacross the input of amplifier 40 is directly proportional to the sum ofthe voltage outputs from all the digital-tooanalog converters 22-29connected through add resistors to the amplifier.

In the position shown in the FIGURE, only add resistor R, is connectedacross from converter 22 to amplifier 40. Thus the output of theamplifier across terminals 41 is a signal the voltage of which isdirectly proportional to the amplitude of the last signal appearing onthe input terminals 11. However, connected in parallel across feedbackresistor R through the switching contacts of a plurality of relays 42-48are a plurality of substantially equal resistors R to R (equal to R thatis). The coils of each pair of corresponding relays 31 and 42, 32 and43, and so on, are

connected in parallel and one side of each set is connected to a pointon the multi-contact shorting switch 49, the blade of which is grounded.A source of emf 50, one side of which is grounded, is connected to theother side of each of the paired sets of relay coils. Thus when switch49 is moved one point to the left, the coils of relays 31 and 42 areenergized from the source 50, thus connecting R between the output ofconverter 23 and line 39, and simultaneously connecting R across inparallel with R Connecting resistor R across R halved the feedbackresistor, thus halved the gain of amplifier 40. Connecting add resistorR to the output of converter 23 produced a voltage on the input ofamplifier 40 directly proportional to the sum of the voltage outputsfrom converters 22 and 23. Now the output on terminals 41 is directlyproportional to the average of the outputs on converters 22 and 23 (thatis, the sum of these voltages, divided by 2). Moving switch 49 to thethird point additionally closes relays 32 and 43, thus decreasing thegain of amplifier 40 to one-third its original value, and adding a thirdvoltage source (that of converter 24) into the circuit. The output onterminals 41 is now the average of the three outputs of converters22-24. Further moving switch 49 to each contact point to the leftincreases the number of outputs from the analog side of the converters22-29 averaged at the output 41 of the circuit. Since the maximum valueof the input signals on these converters was proportional to the cost ofdrilling a foot of well, it is apparent that one produces at terminals41 the average output for N of the last sets of input data and thusproduces a signal proportional to the average cost for drilling those Nfeet, where N is any integer from 1 to a number equal to the number ofdigital-to-analog converters.

In some cases one wishes to compare, one at a time, the maximum valuesfor the input data stored in the registers. This is the function ofmulti-contact switch 30. Providing switch 49 is in the zero positionshown, manipulation of the pole of switch 30 to the second contactproduces an output at terminals 41 directly proportional to the singleoutput of digital-to-analog converter 23; moving the switch to the thirdpoint produces an output at terminals 41 directly proportional to theoutput of converter 24, and so on.

Accordingly, it is possible by means of the circuit shown to obtain theaverage of the maximum value of an adjustable number ofserially-received inputs from two to eight, or to obtain to the samescale a single output directly proportional to the maximum value of asingle selected input from any of these eight sets of data.

In practice this circuit has proved to work quite well. It permits theoperator to have maximum flexibility in viewing individual or averagedgroups, as he wishes. For the particular application discussed, thecircuit was arranged so that each average included the data from thelast input and those received before it in turn, up to a maximum ofeight. The same principle may be employed in.selecting any otheraverage, if desired. It is only necessary to re-wire the relays such as31-38) so that the selected addresistors chosen can connect the desiredsources into the common line 39 running to the input of amplifier 40.

As an example of equipment currently available for use in thisinvention, the analog-to-digital converter 12 can be a TypeADC-8HlO-BNBP converter, manufactured by Pastoriza Division, AnalogDevices, Inc., 221 Fifth Street, Cambridge, Mass. The data registers14-29 each may be made of two 4-bit shift registers,

Type SN7459N, made by Texas Instruments, lnc., Dallas, Tex, Each tworegisters are series connected to form an 8-bit shift register. Thedigital-to-analog converters 22-29 can be Type DAC-8H-3 converters, alsomade by Analog Devices, Inc. Finally, one suitableamplifier 40 is TypeMC1741L(741), manufactured by Motorola Semiconductor Products, Inc.,Phoenix, Ariz.

In summary, the serially-received input signals are converted to digitalform and the value in this form is stored, quite irrespective ofreception time, in the apput of each converter a signal proportional tothe amplitude of the last N input signals received (regardless ofduration of this signal). A; selected number, as desired, of the outputsof these'digital-to-analog converters are connectedv through addresistors of high resistance to an adjustable gain amplifier ofrelatively low input resistance, the gain of the amplifier beingadjusted inversely proportional to-the number of active add resistors inthe circuit. The output of the amplifier then is directly proportionalto the average of the maximum of the data from the signals selected.

We claim: 1. A circuit for averaging a variable plurality of electricsignals occurring one after the other comprising an analog-to-digitalconverter the input to which is responsive to the amplitude of each ofsaid signals, a set of data registers equal in number to the desirednumber of bits in the output from said converter, the input to each ofsaid set being individually connected to one output terminal of saidconverter, electric means connected to said converter for. transferringeach bit of the output of said converter to one of said set of dataregisters, v a set of digital-to-analog converters, the inputs to eachof which are connected separately to one level of the output terminalsof said set of shift registers, means to shift data stored in the formof bits in said set of data registers by one location when the bits insaid analog-to-digital converter are transferred to said set of dataregisters,

an adjustable gain amplifier having a predetermined input resistance R,

a set of substantially equal add resistors of value R [R' being largecompared to R], one side of each of which is connected to the input ofsaid amplifimeans for connecting a desired plurality of the outputs ofsaid set of digital-to-analog converters individually to the other endof one each of the add resistors R while all other of said add resistorsare disconnected, and

means for adjusting the gain of said amplifier inversely proportional tothe number of connected add resistors,

whereby the output of said amplifier is a signal the amplitude of whichis proportional to the average of said desired plurality of electricsignals.

2 Apparatus in accordance with claim 1, in which said amplifier is ofnegative feedback type with the effective gain governed by the value ofthe feedback resistor employed, and said means for adjusting the gain ofsaid amplifier stepwise adjusts said gain by connecting in parallel assaid feedback resistor a set of substantially equal resistors of numberequal to the number of electric signals being averaged.

3. Apparatus in accordance with claim 2, including switching means forconnecting one of said add resistors R to any one only of said outputsof said set of digital-to-analog converters.

1. A circuit for averaging a variable plurality of electric signalsoccurring one after the other comprising an analog-to-digital converterthe input to which is responsive to the amplitude of each of saidsignals, a set of data registers equal in number to the desired numberof bits in the output from said converter, the input to each of said setbeing individually connected to one output terminal of said converter,electric means connected to said converter for transferring each bit ofthe output of said converter to one of said set of data registers, a setof digital-to-analog converters, the inputs to each of which areconnected separately to one level of the output terminals of said set ofshift registers, means to shift data stored in the form of bits in saidset of data registers by one location when the bits in saidanalog-todigital converter are transferred to said set of dataregisters, an adjustable gain amplifier having a predetermined inputresistance R, a set of substantially equal add resistors of value R''(R'' being large compared to R), one side of each of which is connectedto the input of said amplifier, means for connecting a desired pluralityof the outputs of said set of digital-to-analog converters individuallyto the other end of one each of the add resistors R'' while all other ofsaid add resistors are disconnected, and means for adjusting the gain ofsaid amplifier inversely proportional to the number of connected addresistors, whereby the output of said amplifier is a signal theamplitude of which is proportional to the average of said desiredplurality of electric signals.
 1. A circuit for averaging a variableplurality of electric signals occurring one after the other comprisingan analog-to-digital converter the input to which is responsive to theamplitude of each of said signals, a set of data registers equal innumber to the desired number of bits in the output from said converter,the input to each of said set being individually connected to one outputterminal of said converter, electric means connected to said converterfor transferring each bit of the output of said converter to one of saidset of data registers, a set of digital-to-analog converters, the inputsto each of which are connected separately to one level of the outputterminals of said set of shift registers, means to shift data stored inthe form of bits in said set of data registers by one location when thebits in said analog-to-digital converter are transferred to said set ofdata registers, an adjustable gain amplifier having a predeterminedinput resistance R, a set of substantially equal add resistors of valueR'' (R'' being large compared to R), one side of each of which isconnected to the input of said amplifier, means for connecting a desiredplurality of the outputs of said set of digital-to-analog convertersindividually to the other end of one each of the add resistors R'' whileall other of said add resistors are disconnected, and means foradjusting the gain of said amplifier inversely proportional to thenumber of connected add resistors, whereby the output of said amplifieris a signal the amplitude of which is proportional to the average ofsaid desired plurality of electric signals.
 2. Apparatus in accordancewith claim 1, in which said amplifier is of negative feedback type withthe effective gain governed by the value of the feedback resistoremployed, and said means for adjusting the gain of said amplifierstepwise adjusts said gain by connecting in parallel as said feedbackresistor a set of substantially equal resistors of number equal to thenumber of electric signals being averaged.